1. Field of the Invention
The present invention relates to semiconductor memory devices, and more particularly to a semiconductor memory device which permits control of an internal power supply voltage in a packaged state.
2. Description of the Background Art
Generally, in a semiconductor memory device such as a dynamic random access memory (DRAM), a reference voltage is firstly generated based on an externally supplied power supply voltage, and a plurality of kinds of internal power supply voltages are generated from the reference voltage.
A conventional semiconductor memory device described in Japanese Patent Laying-Open No. 2002-15599 includes a reference voltage generating circuit which receives an external power supply voltage and generates an internal reference voltage, a standard voltage circuit which receives the internal reference voltage and outputs a standard voltage of a prescribed value, and an internal power supply circuit which generates an internal power supply voltage based on the standard voltage of the prescribed value and the external power supply voltage. The standard voltage circuit blows an arbitrary fuse based on a measurement of the standard voltage obtained by probing, so that it can fine-adjust the standard voltage to a preset voltage value before output.
With a semiconductor memory device such as a DRAM, it is generally necessary to evaluate an operation margin of the semiconductor memory device with respect to an internal power supply voltage in a test before shipment as a product.
The conventional semiconductor memory device described in Japanese Patent Laying-Open No. 2002-15599, however, cannot control the internal power supply voltage in a molded state having the semiconductor chip covered with a mold resin and packaged, and thus, it is impossible to evaluate the operation margin of the semiconductor memory device with respect to the internal power supply voltage in the molded state from the outside.